%0 Conference Paper %1 conf/aspdac/ZhengX015 %A Zheng, Yang %A Xu, Cong %A Xie, Yuan %B ASP-DAC %D 2015 %I IEEE %K dblp %P 112-117 %T Modeling framework for cross-point resistive memory design emphasizing reliability and variability issues. %U http://dblp.uni-trier.de/db/conf/aspdac/aspdac2015.html#ZhengX015 %@ 978-1-4799-7792-5

@inproceedings{conf/aspdac/ZhengX015, added-at = {2017-05-26T00:00:00.000+0200}, author = {Zheng, Yang and Xu, Cong and Xie, Yuan}, biburl = {https://www.bibsonomy.org/bibtex/2ab4b32f328cccf5c35e0b4c403882cf5/dblp}, booktitle = {ASP-DAC}, crossref = {conf/aspdac/2015}, ee = {https://doi.org/10.1109/ASPDAC.2015.7058990}, interhash = {5a81f0c341050422f5d091fde455edf5}, intrahash = {ab4b32f328cccf5c35e0b4c403882cf5}, isbn = {978-1-4799-7792-5}, keywords = {dblp}, pages = {112-117}, publisher = {IEEE}, timestamp = {2019-10-17T16:45:23.000+0200}, title = {Modeling framework for cross-point resistive memory design emphasizing reliability and variability issues.}, url = {http://dblp.uni-trier.de/db/conf/aspdac/aspdac2015.html#ZhengX015}, year = 2015 }