%0 Conference Paper %1 conf/isca/BarrosoGMNQSSSV00 %A Barroso, Luiz André %A Gharachorloo, Kourosh %A McNamara, Robert %A Nowatzyk, Andreas %A Qadeer, Shaz %A Sano, Barton %A Smith, Scott %A Stets, Robert %A Verghese, Ben %B ISCA %D 2000 %E Berenbaum, Alan D. %E Emer, Joel S. %I IEEE Computer Society %K dblp %P 282-293 %T Piranha: a scalable architecture based on single-chip multiprocessing. %U http://dblp.uni-trier.de/db/conf/isca/isca2000.html#BarrosoGMNQSSSV00 %@ 978-1-58113-232-8

@inproceedings{conf/isca/BarrosoGMNQSSSV00, added-at = {2023-03-24T00:00:00.000+0100}, author = {Barroso, Luiz André and Gharachorloo, Kourosh and McNamara, Robert and Nowatzyk, Andreas and Qadeer, Shaz and Sano, Barton and Smith, Scott and Stets, Robert and Verghese, Ben}, biburl = {https://www.bibsonomy.org/bibtex/22ffc21111d313cec984bdb1e75e815ad/dblp}, booktitle = {ISCA}, crossref = {conf/isca/2000}, editor = {Berenbaum, Alan D. and Emer, Joel S.}, ee = {https://doi.org/10.1145/339647.339696}, interhash = {75337f51c8b4c6ddb5c38fe26a30c08d}, intrahash = {2ffc21111d313cec984bdb1e75e815ad}, isbn = {978-1-58113-232-8}, keywords = {dblp}, pages = {282-293}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T01:41:49.000+0200}, title = {Piranha: a scalable architecture based on single-chip multiprocessing.}, url = {http://dblp.uni-trier.de/db/conf/isca/isca2000.html#BarrosoGMNQSSSV00}, year = 2000 }