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Disambiguation of "Barroso, Luiz André"

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Piranha: a scalable architecture based on single-chip multiprocessing.

, , , , , , , , and . ISCA, page 282-293. IEEE Computer Society, (2000)

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André Luiz Belém

André Luiz Freitas Francisco

Thomas Luiz

Luiz Dahlheim

Luiz Bicca

 

Other publications of authors with the same name

Code layout optimizations for transaction processing workloads., , , , , , and . ISCA, page 155-164. ACM, (2001)A Methodology for Performance Evaluation of Parallel Applications on Multiprocessors., and . J. Parallel Distributed Comput., 14 (1): 1-14 (1992)Piranha: a scalable architecture based on single-chip multiprocessing., , , , , , , , and . ISCA, page 282-293. IEEE Computer Society, (2000)Impact of Chip-Level Integration on Performance of OLTP Workloads., , , and . HPCA, page 3-14. IEEE Computer Society, (2000)FAWN: a fast array of wimpy nodes: technical perspective.. Commun. ACM, 54 (7): 100 (2011)The Datacenter as a Computer: An Introduction to the Design of Warehouse-Scale Machines, and . Synthesis Lectures on Computer Architecture Morgan & Claypool Publishers, (2009)The Datacenter as a Computer: An Introduction to the Design of Warehouse-Scale Machines, Second Edition, , and . Synthesis Lectures on Computer Architecture Morgan & Claypool Publishers, (2013)Performance of Database Workloads on Shared-Memory Systems with Out-of-Order Processors., , , and . ASPLOS, page 307-318. ACM Press, (1998)An Analysis of Database Workload Performance on Simultaneous Multithreaded Processors., , , , , and . ISCA, page 39-50. IEEE Computer Society, (1998)Memory System Characterization of Commercial Workloads., , and . ISCA, page 3-14. IEEE Computer Society, (1998)