%0 Conference Paper %1 conf/vlsid/DevanathanS11 %A Devanathan, V. R. %A Shah, Ishaan Santhosh %B VLSI Design %D 2011 %I IEEE Computer Society %K dblp %P 262-267 %T Hazard-Aware Directed Transition Fault ATPG for Effective Critical Path Test. %U http://dblp.uni-trier.de/db/conf/vlsid/vlsid2011.html#DevanathanS11 %@ 978-0-7695-4348-2

@inproceedings{conf/vlsid/DevanathanS11, added-at = {2023-03-24T00:00:00.000+0100}, author = {Devanathan, V. R. and Shah, Ishaan Santhosh}, biburl = {https://www.bibsonomy.org/bibtex/2e252a7adce82e81fb75ad5893fc9b7ee/dblp}, booktitle = {VLSI Design}, crossref = {conf/vlsid/2011}, ee = {https://doi.ieeecomputersociety.org/10.1109/VLSID.2011.42}, interhash = {86d7c8f92b73c77b4a06d1de68cdf4e6}, intrahash = {e252a7adce82e81fb75ad5893fc9b7ee}, isbn = {978-0-7695-4348-2}, keywords = {dblp}, pages = {262-267}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T04:08:33.000+0200}, title = {Hazard-Aware Directed Transition Fault ATPG for Effective Critical Path Test.}, url = {http://dblp.uni-trier.de/db/conf/vlsid/vlsid2011.html#DevanathanS11}, year = 2011 }