%0 Conference Paper %1 conf/dac/ZhangCTL10 %A Zhang, Wangyang %A Chen, Tsung-Hao %A Ting, Ming Yuan %A Li, Xin %B DAC %D 2010 %E Sapatnekar, Sachin S. %I ACM %K dblp %P 897-902 %T Toward efficient large-scale performance modeling of integrated circuits via multi-mode/multi-corner sparse regression. %U http://dblp.uni-trier.de/db/conf/dac/dac2010.html#ZhangCTL10 %@ 978-1-4503-0002-5

@inproceedings{conf/dac/ZhangCTL10, added-at = {2018-11-06T00:00:00.000+0100}, author = {Zhang, Wangyang and Chen, Tsung-Hao and Ting, Ming Yuan and Li, Xin}, biburl = {https://www.bibsonomy.org/bibtex/22e9c5419d0d863ad391c71d6c3dd9ff5/dblp}, booktitle = {DAC}, crossref = {conf/dac/2010}, editor = {Sapatnekar, Sachin S.}, ee = {https://doi.org/10.1145/1837274.1837500}, interhash = {87d57fc0ba76b6c39d1b18c394ff0d8b}, intrahash = {2e9c5419d0d863ad391c71d6c3dd9ff5}, isbn = {978-1-4503-0002-5}, keywords = {dblp}, pages = {897-902}, publisher = {ACM}, timestamp = {2018-11-07T15:14:03.000+0100}, title = {Toward efficient large-scale performance modeling of integrated circuits via multi-mode/multi-corner sparse regression.}, url = {http://dblp.uni-trier.de/db/conf/dac/dac2010.html#ZhangCTL10}, year = 2010 }