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Toward efficient large-scale performance modeling of integrated circuits via multi-mode/multi-corner sparse regression.

, , , and . DAC, page 897-902. ACM, (2010)

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An Efficient Method for Chip-Level Statistical Capacitance Extraction Considering Process Variations with Spatial Correlation., , , , , and . DATE, page 580-585. ACM, (2008)Bayesian model fusion: large-scale performance modeling of analog and mixed-signal circuits by reusing early-stage data., , , , and . DAC, page 64:1-64:6. ACM, (2013)Large-scale statistical performance modeling of analog and mixed-signal circuits., , and . CICC, page 1-8. IEEE, (2012)IC Spatial Variation Modeling: Algorithms and Applications.. Carnegie Mellon University, USA, (2012)Automatic clustering of wafer spatial signatures., , , , and . DAC, page 71:1-71:6. ACM, (2013)Efficient parametric yield estimation of analog/mixed-signal circuits via Bayesian model fusion., , , , and . ICCAD, page 627-634. ACM, (2012)Parallel statistical capacitance extraction of on-chip interconnects with an improved geometric variation model., , and . ASP-DAC, page 67-72. IEEE, (2011)Bayesian virtual probe: minimizing variation characterization cost for nanoscale IC technologies via Bayesian inference., , and . DAC, page 262-267. ACM, (2010)Test data analytics - Exploring spatial and test-item correlations in production test data., , , , , , and . ITC, page 1-10. IEEE Computer Society, (2013)Test cost reduction through performance prediction using virtual probe., , , , and . ITC, page 1-9. IEEE Computer Society, (2011)