%0 Conference Paper %1 conf/asicon/HiraiYAKTGK19 %A Hirai, Manato %A Yamamoto, Shuhei %A Arai, Hirotaka %A Kuwana, Anna %A Tanimoto, Hiroshi %A Gendai, Yuji %A Kobayashi, Haruo %B ASICON %D 2019 %I IEEE %K dblp %P 1-4 %T Systematic Construction of Resistor Ladder Network for N-ary DACs. %U http://dblp.uni-trier.de/db/conf/asicon/asicon2019.html#HiraiYAKTGK19 %@ 978-1-7281-0735-6

@inproceedings{conf/asicon/HiraiYAKTGK19, added-at = {2020-02-12T00:00:00.000+0100}, author = {Hirai, Manato and Yamamoto, Shuhei and Arai, Hirotaka and Kuwana, Anna and Tanimoto, Hiroshi and Gendai, Yuji and Kobayashi, Haruo}, biburl = {https://www.bibsonomy.org/bibtex/2f662e87c93cee7cf77cd669d2d455250/dblp}, booktitle = {ASICON}, crossref = {conf/asicon/2019}, ee = {https://doi.org/10.1109/ASICON47005.2019.8983583}, interhash = {8e43fee231656c82a60e842788d0d509}, intrahash = {f662e87c93cee7cf77cd669d2d455250}, isbn = {978-1-7281-0735-6}, keywords = {dblp}, pages = {1-4}, publisher = {IEEE}, timestamp = {2020-02-13T12:22:20.000+0100}, title = {Systematic Construction of Resistor Ladder Network for N-ary DACs.}, url = {http://dblp.uni-trier.de/db/conf/asicon/asicon2019.html#HiraiYAKTGK19}, year = 2019 }