%0 Conference Paper %1 conf/isvlsi/ZengH05 %A Zeng, Kaiping %A Huss, Sorin A. %B ISVLSI %D 2005 %I IEEE Computer Society %K dblp %P 266-267 %T RAMS: A VHDL-AMS Code Refactoring Tool Supporting High Level Analog Synthesis. %U http://dblp.uni-trier.de/db/conf/isvlsi/isvlsi2005.html#ZengH05 %@ 0-7695-2365-X

@inproceedings{conf/isvlsi/ZengH05, added-at = {2023-03-24T00:00:00.000+0100}, author = {Zeng, Kaiping and Huss, Sorin A.}, biburl = {https://www.bibsonomy.org/bibtex/263adc0770e5613664874eb2263262561/dblp}, booktitle = {ISVLSI}, crossref = {conf/isvlsi/2005}, ee = {https://doi.ieeecomputersociety.org/10.1109/ISVLSI.2005.60}, interhash = {92cdf1c6299a833bd4106b4a9406293a}, intrahash = {63adc0770e5613664874eb2263262561}, isbn = {0-7695-2365-X}, keywords = {dblp}, pages = {266-267}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T11:06:33.000+0200}, title = {RAMS: A VHDL-AMS Code Refactoring Tool Supporting High Level Analog Synthesis.}, url = {http://dblp.uni-trier.de/db/conf/isvlsi/isvlsi2005.html#ZengH05}, year = 2005 }