%0 Conference Paper %1 conf/IEEEcit/WangWSW17 %A Wang, Qiong %A Wang, Jialong %A Shen, Li %A Wang, Zhiying %B CIT %D 2017 %I IEEE Computer Society %K dblp %P 184-191 %T A Software-Hardware Co-designed Methodology for Efficient Thread Level Speculation. %U http://dblp.uni-trier.de/db/conf/IEEEcit/IEEEcit2017.html#WangWSW17 %@ 978-1-5386-0958-3

@inproceedings{conf/IEEEcit/WangWSW17, added-at = {2023-03-24T00:00:00.000+0100}, author = {Wang, Qiong and Wang, Jialong and Shen, Li and Wang, Zhiying}, biburl = {https://www.bibsonomy.org/bibtex/2308949d32c383eb6ed3bbf40f49ffe79/dblp}, booktitle = {CIT}, crossref = {conf/IEEEcit/2017}, ee = {https://doi.ieeecomputersociety.org/10.1109/CIT.2017.49}, interhash = {98cc54d247cb17dd1d857681bc6c391d}, intrahash = {308949d32c383eb6ed3bbf40f49ffe79}, isbn = {978-1-5386-0958-3}, keywords = {dblp}, pages = {184-191}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T10:10:25.000+0200}, title = {A Software-Hardware Co-designed Methodology for Efficient Thread Level Speculation.}, url = {http://dblp.uni-trier.de/db/conf/IEEEcit/IEEEcit2017.html#WangWSW17}, year = 2017 }