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%0 Conference Paper
%1 conf/fpt/AmmendolaBFCLPRSTV13
%A Ammendola, Roberto
%A Biagioni, Andrea
%A Frezza, Ottorino
%A Cicero, Francesca Lo
%A Lonardo, Alessandro
%A Paolucci, Pier Stanislao
%A Rossetti, Davide
%A Simula, Francesco
%A Tosoratto, Laura
%A Vicini, Piero
%B FPT
%D 2013
%I IEEE
%K dblp
%P 58-65
%T Virtual-to-Physical address translation for an FPGA-based interconnect with host and GPU remote DMA capabilities.
%U http://dblp.uni-trier.de/db/conf/fpt/fpt2013.html#AmmendolaBFCLPRSTV13
@inproceedings{conf/fpt/AmmendolaBFCLPRSTV13,
added-at = {2017-06-15T00:00:00.000+0200},
author = {Ammendola, Roberto and Biagioni, Andrea and Frezza, Ottorino and Cicero, Francesca Lo and Lonardo, Alessandro and Paolucci, Pier Stanislao and Rossetti, Davide and Simula, Francesco and Tosoratto, Laura and Vicini, Piero},
biburl = {https://www.bibsonomy.org/bibtex/21e930de592520c5824749e5526896ef5/dblp},
booktitle = {FPT},
crossref = {conf/fpt/2013},
ee = {https://doi.org/10.1109/FPT.2013.6718331},
interhash = {a059e9c820aa2c6e70b4282d066bfb49},
intrahash = {1e930de592520c5824749e5526896ef5},
keywords = {dblp},
pages = {58-65},
publisher = {IEEE},
timestamp = {2019-10-17T23:10:20.000+0200},
title = {Virtual-to-Physical address translation for an FPGA-based interconnect with host and GPU remote DMA capabilities.},
url = {http://dblp.uni-trier.de/db/conf/fpt/fpt2013.html#AmmendolaBFCLPRSTV13},
year = 2013
}