%0 Conference Paper %1 conf/vlsic/GuoWKRSSKK20 %A Guo, Zheng %A Wiedemer, Jami %A Kim, Yusung %A Ramamoorthy, Prithvee Sundararajan %A Sathyaprasad, Prateeksha Bindiganavile %A Shridharan, Smita %A Kim, Daeyeon %A Karl, Eric %B VLSI Circuits %D 2020 %I IEEE %K dblp %P 1-2 %T A 10nm SRAM Design using Gate-Modulated Self-Collapse Write Assist Enabling 175mV VMIN Reduction with Negligible Power Overhead. %U http://dblp.uni-trier.de/db/conf/vlsic/vlsic2020.html#GuoWKRSSKK20 %@ 978-1-7281-9942-9

@inproceedings{conf/vlsic/GuoWKRSSKK20, added-at = {2021-09-02T00:00:00.000+0200}, author = {Guo, Zheng and Wiedemer, Jami and Kim, Yusung and Ramamoorthy, Prithvee Sundararajan and Sathyaprasad, Prateeksha Bindiganavile and Shridharan, Smita and Kim, Daeyeon and Karl, Eric}, biburl = {https://www.bibsonomy.org/bibtex/2738bf386e1e2d71e4cd5ffed2eedc598/dblp}, booktitle = {VLSI Circuits}, crossref = {conf/vlsic/2020}, ee = {https://doi.org/10.1109/VLSICircuits18222.2020.9162782}, interhash = {b137185ddb28897b6415c8db22b0b407}, intrahash = {738bf386e1e2d71e4cd5ffed2eedc598}, isbn = {978-1-7281-9942-9}, keywords = {dblp}, pages = {1-2}, publisher = {IEEE}, timestamp = {2024-04-10T15:34:38.000+0200}, title = {A 10nm SRAM Design using Gate-Modulated Self-Collapse Write Assist Enabling 175mV VMIN Reduction with Negligible Power Overhead.}, url = {http://dblp.uni-trier.de/db/conf/vlsic/vlsic2020.html#GuoWKRSSKK20}, year = 2020 }