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Disambiguation of "Kim, Daeyeon"

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A 10nm SRAM Design using Gate-Modulated Self-Collapse Write Assist Enabling 175mV VMIN Reduction with Negligible Power Overhead.

, , , , , , , and . VLSI Circuits, page 1-2. IEEE, (2020)

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Ky ng Kim

Die Artikelstruktur in passiven zweisprachigen Wörterbüchern Deutsch-Koreanisch: Konzeption zur Erstellung eines zweisprachigen Lernerwörterbuchs Deutsch-Koreanisch. Uni Heidelberg, (2008)

Kim Gerber

Bongcheol Kim

Youngsang Kim

Sunghun Kim

 

Other publications of authors with the same name

Signal-Integrity-Aware Interposer Bus Routing in 2.5D Heterogeneous Integration., , , and . ASP-DAC, page 178-183. IEEE, (2022)Centip3De: A 3930DMIPS/W configurable near-threshold 3D stacked system with 64 ARM Cortex-M3 cores., , , , , , , , , and 5 other author(s). ISSCC, page 190-192. IEEE, (2012)A 128kb high density portless SRAM using hierarchical bitlines and thyristor sense amplifiers., , , , and . ISQED, page 87-90. IEEE, (2011)Poster Abstract: DeepRT: A Predictable Deep Learning Inference Framework for IoT Devices., and . IoTDI, page 279-280. IEEE Computer Society, (2018)Adaptive modulation method for MGS video streaming., , and . EUVIP, page 122-127. IEEE, (2011)A resource allocation algorithm for OFDM-based cellular system serving unicast and multicast services., , and . EURASIP J. Wireless Comm. and Networking, (2013)A 23.6Mb/mm2 SRAM in 10nm FinFET technology with pulsed PMOS TVC and stepped-WL for low-voltage applications., , , , , and . ISSCC, page 196-198. IEEE, (2018)17.1 A 0.6V 1.5GHz 84Mb SRAM design in 14nm FinFET CMOS technology., , , , , , , , , and . ISSCC, page 1-3. IEEE, (2015)RL-Legalizer: Reinforcement Learning-based Cell Priority Optimization in Mixed-Height Standard Cell Legalization., , , , , and . DATE, page 1-6. IEEE, (2023)15.2 A 2048x60m4 SRAM Design in Intel 4 with an Around-the-Array Power-Delivery Scheme Using PowerVia., , , , , , , , , and 3 other author(s). ISSCC, page 278-280. IEEE, (2024)