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%0 Journal Article
%1 journals/jssc/PesslGHGH04
%A Pessl, Peter
%A Gaggl, Richard
%A Hohl, Johannes
%A Giotta, Dario
%A Hauptmann, Joerg
%D 2004
%J IEEE J. Solid State Circuits
%K dblp
%N 12
%P 2371-2378
%T A four-channel ADSL2+ analog front-end for CO applications with 75 mW per channel, built in 0.13-μm CMOS.
%U http://dblp.uni-trier.de/db/journals/jssc/jssc39.html#PesslGHGH04
%V 39
@article{journals/jssc/PesslGHGH04,
added-at = {2024-10-06T00:00:00.000+0200},
author = {Pessl, Peter and Gaggl, Richard and Hohl, Johannes and Giotta, Dario and Hauptmann, Joerg},
biburl = {https://www.bibsonomy.org/bibtex/20f8c9700a684eb0265b961cb78cf45a0/dblp},
ee = {https://doi.org/10.1109/JSSC.2004.835645},
interhash = {bb5a0ca408ba8ad387b5a9490cf8d31a},
intrahash = {0f8c9700a684eb0265b961cb78cf45a0},
journal = {IEEE J. Solid State Circuits},
keywords = {dblp},
number = 12,
pages = {2371-2378},
timestamp = {2024-10-07T07:51:27.000+0200},
title = {A four-channel ADSL2+ analog front-end for CO applications with 75 mW per channel, built in 0.13-μm CMOS.},
url = {http://dblp.uni-trier.de/db/journals/jssc/jssc39.html#PesslGHGH04},
volume = 39,
year = 2004
}