%0 Journal Article %1 journals/jssc/FischerDDNP06 %A Fischer, Tim C. %A Desai, Jayen %A Doyle, Bruce Andrew %A Naffziger, Samuel %A Patella, Ben %D 2006 %J IEEE J. Solid State Circuits %K dblp %N 1 %P 218-228 %T A 90-nm variable frequency clock system for a power-managed itanium architecture processor. %U http://dblp.uni-trier.de/db/journals/jssc/jssc41.html#FischerDDNP06 %V 41

@article{journals/jssc/FischerDDNP06, added-at = {2023-08-28T00:00:00.000+0200}, author = {Fischer, Tim C. and Desai, Jayen and Doyle, Bruce Andrew and Naffziger, Samuel and Patella, Ben}, biburl = {https://www.bibsonomy.org/bibtex/20716a8e63393ae18bed922b36a6457c5/dblp}, ee = {https://www.wikidata.org/entity/Q114738427}, interhash = {bd7142a0a27344631050c491b8b65027}, intrahash = {0716a8e63393ae18bed922b36a6457c5}, journal = {IEEE J. Solid State Circuits}, keywords = {dblp}, number = 1, pages = {218-228}, timestamp = {2024-04-08T10:44:19.000+0200}, title = {A 90-nm variable frequency clock system for a power-managed itanium architecture processor.}, url = {http://dblp.uni-trier.de/db/journals/jssc/jssc41.html#FischerDDNP06}, volume = 41, year = 2006 }