%0 Conference Paper %1 conf/iscas/RaveendranEKV22 %A Raveendran, Sithara %A Edavoor, Pranose J. %A Kumar, Y. B. Nithin %A Vasantha, M. H. %B ISCAS %D 2022 %I IEEE %K dblp %P 3428-3432 %T On The Design Of Rationalised Bi-orthogonal Wavelet Using Reversible Logic. %U http://dblp.uni-trier.de/db/conf/iscas/iscas2022.html#RaveendranEKV22 %@ 978-1-6654-8485-5

@inproceedings{conf/iscas/RaveendranEKV22, added-at = {2022-11-17T00:00:00.000+0100}, author = {Raveendran, Sithara and Edavoor, Pranose J. and Kumar, Y. B. Nithin and Vasantha, M. H.}, biburl = {https://www.bibsonomy.org/bibtex/2f3eb43eb365851534b4dbb240cfac206/dblp}, booktitle = {ISCAS}, crossref = {conf/iscas/2022}, ee = {https://doi.org/10.1109/ISCAS48785.2022.9937995}, interhash = {1c1a31a25ab0eef12df8a608c49e4f68}, intrahash = {f3eb43eb365851534b4dbb240cfac206}, isbn = {978-1-6654-8485-5}, keywords = {dblp}, pages = {3428-3432}, publisher = {IEEE}, timestamp = {2024-04-09T21:29:44.000+0200}, title = {On The Design Of Rationalised Bi-orthogonal Wavelet Using Reversible Logic.}, url = {http://dblp.uni-trier.de/db/conf/iscas/iscas2022.html#RaveendranEKV22}, year = 2022 }