%0 Conference Paper %1 conf/glvlsi/WangHN13 %A Wang, Qin %A Heittmann, Arne %A Noll, Tobias G. %B ACM Great Lakes Symposium on VLSI %D 2013 %E Ayala, José Luis %E Jones, Alex K. %E Madden, Patrick H. %E Coskun, Ayse K. %I ACM %K dblp %P 233-238 %T Analysis of the area-delay performance of hybrid nanoelectronic memory cores used in field programmable gate arrays. %U http://dblp.uni-trier.de/db/conf/glvlsi/glvlsi2013.html#WangHN13 %@ 978-1-4503-2032-0

@inproceedings{conf/glvlsi/WangHN13, added-at = {2018-11-06T00:00:00.000+0100}, author = {Wang, Qin and Heittmann, Arne and Noll, Tobias G.}, biburl = {https://www.bibsonomy.org/bibtex/223d14af4aa99d9f90cbd5cb489764ee1/dblp}, booktitle = {ACM Great Lakes Symposium on VLSI}, crossref = {conf/glvlsi/2013}, editor = {Ayala, José Luis and Jones, Alex K. and Madden, Patrick H. and Coskun, Ayse K.}, ee = {https://doi.org/10.1145/2483028.2483100}, interhash = {cd8e671e783ea57df8969a285e5ef4d2}, intrahash = {23d14af4aa99d9f90cbd5cb489764ee1}, isbn = {978-1-4503-2032-0}, keywords = {dblp}, pages = {233-238}, publisher = {ACM}, timestamp = {2019-07-24T11:38:00.000+0200}, title = {Analysis of the area-delay performance of hybrid nanoelectronic memory cores used in field programmable gate arrays.}, url = {http://dblp.uni-trier.de/db/conf/glvlsi/glvlsi2013.html#WangHN13}, year = 2013 }