%0 Conference Paper %1 conf/acssc/DengGHLY020 %A Deng, Chunhua %A Gong, Yongbin %A Han, Feng %A Liao, Siyu %A Yi, Jingang %A Yuan, Bo %B ACSSC %D 2020 %E Matthews, Michael B. %I IEEE %K dblp %P 121-124 %T VLSI Hardware Architecture for Gaussian Process. %U http://dblp.uni-trier.de/db/conf/acssc/acssc2020.html#DengGHLY020 %@ 978-0-7381-3126-9

@inproceedings{conf/acssc/DengGHLY020, added-at = {2021-06-08T00:00:00.000+0200}, author = {Deng, Chunhua and Gong, Yongbin and Han, Feng and Liao, Siyu and Yi, Jingang and Yuan, Bo}, biburl = {https://www.bibsonomy.org/bibtex/2731d666ac56080e54702bc4aba699775/dblp}, booktitle = {ACSSC}, crossref = {conf/acssc/2020}, editor = {Matthews, Michael B.}, ee = {https://doi.org/10.1109/IEEECONF51394.2020.9443272}, interhash = {d23b00508039d6eea4886753d8fe9196}, intrahash = {731d666ac56080e54702bc4aba699775}, isbn = {978-0-7381-3126-9}, keywords = {dblp}, pages = {121-124}, publisher = {IEEE}, timestamp = {2024-04-09T16:34:36.000+0200}, title = {VLSI Hardware Architecture for Gaussian Process.}, url = {http://dblp.uni-trier.de/db/conf/acssc/acssc2020.html#DengGHLY020}, year = 2020 }