%0 Journal Article %1 journals/todaes/RaoJBS09 %A Rao, Rajeev R. %A Joshi, Vivek %A Blaauw, David T. %A Sylvester, Dennis %D 2009 %J ACM Trans. Design Autom. Electr. Syst. %K dblp %N 1 %P 5:1-5:27 %T Circuit optimization techniques to mitigate the effects of soft errors in combinational logic. %U http://dblp.uni-trier.de/db/journals/todaes/todaes15.html#RaoJBS09 %V 15

@article{journals/todaes/RaoJBS09, added-at = {2018-11-06T00:00:00.000+0100}, author = {Rao, Rajeev R. and Joshi, Vivek and Blaauw, David T. and Sylvester, Dennis}, biburl = {https://www.bibsonomy.org/bibtex/26a7a9ed2f622d7fcae47736ddf374ad4/dblp}, ee = {https://doi.org/10.1145/1640457.1640462}, interhash = {d33c82268a36e33066423e1be5b6695c}, intrahash = {6a7a9ed2f622d7fcae47736ddf374ad4}, journal = {ACM Trans. Design Autom. Electr. Syst.}, keywords = {dblp}, number = 1, pages = {5:1-5:27}, timestamp = {2018-11-07T12:23:55.000+0100}, title = {Circuit optimization techniques to mitigate the effects of soft errors in combinational logic.}, url = {http://dblp.uni-trier.de/db/journals/todaes/todaes15.html#RaoJBS09}, volume = 15, year = 2009 }