%0 Conference Paper %1 conf/iscas/PavanTN99 %A Pavan, Shanthi %A Tsividis, Yannis P. %A Nagaraj, Krishnaswamy %B ISCAS (6) %D 1999 %I IEEE %K dblp %P 202-205 %T Modeling of accumulation MOS capacitors for analog design in digital VLSI processes. %U http://dblp.uni-trier.de/db/conf/iscas/iscas1999-6.html#PavanTN99 %@ 0-7803-5471-0

@inproceedings{conf/iscas/PavanTN99, added-at = {2019-09-03T00:00:00.000+0200}, author = {Pavan, Shanthi and Tsividis, Yannis P. and Nagaraj, Krishnaswamy}, biburl = {https://www.bibsonomy.org/bibtex/2c79e8d26a9a9a1208d49c14abc8bb023/dblp}, booktitle = {ISCAS (6)}, crossref = {conf/iscas/1999}, ee = {https://doi.org/10.1109/ISCAS.1999.780130}, interhash = {d46a192c1a564bcff9b23bf7ca96c50f}, intrahash = {c79e8d26a9a9a1208d49c14abc8bb023}, isbn = {0-7803-5471-0}, keywords = {dblp}, pages = {202-205}, publisher = {IEEE}, timestamp = {2019-09-04T11:40:06.000+0200}, title = {Modeling of accumulation MOS capacitors for analog design in digital VLSI processes.}, url = {http://dblp.uni-trier.de/db/conf/iscas/iscas1999-6.html#PavanTN99}, year = 1999 }