%0 Conference Paper %1 conf/memsys/0001KSSWW19 %A Jung, Matthias %A Kraft, Kira %A Soliman, Taha %A Sudarshan, Chirag %A Weis, Christian %A Wehn, Norbert %B MEMSYS %D 2019 %I ACM %K dblp %P 133-147 %T Fast validation of DRAM protocols with timed petri nets. %U http://dblp.uni-trier.de/db/conf/memsys/memsys2019.html#0001KSSWW19 %@ 978-1-4503-7206-0

@inproceedings{conf/memsys/0001KSSWW19, added-at = {2021-07-25T00:00:00.000+0200}, author = {Jung, Matthias and Kraft, Kira and Soliman, Taha and Sudarshan, Chirag and Weis, Christian and Wehn, Norbert}, biburl = {https://www.bibsonomy.org/bibtex/2521b235996be1a1a87515ef3c8eed2f7/dblp}, booktitle = {MEMSYS}, crossref = {conf/memsys/2019}, ee = {https://doi.org/10.1145/3357526.3357556}, interhash = {d802f07d244776c83f04514301510d6f}, intrahash = {521b235996be1a1a87515ef3c8eed2f7}, isbn = {978-1-4503-7206-0}, keywords = {dblp}, pages = {133-147}, publisher = {ACM}, timestamp = {2024-04-10T20:28:01.000+0200}, title = {Fast validation of DRAM protocols with timed petri nets.}, url = {http://dblp.uni-trier.de/db/conf/memsys/memsys2019.html#0001KSSWW19}, year = 2019 }