%0 Journal Article %1 journals/vlsisp/CantineauPL98 %A Cantineau, Olivier %A Petit, Laurent %A Legat, Jean-Didier %D 1998 %J VLSI Signal Processing %K dblp %N 3 %P 251-265 %T Architecture of a Memory Manager for an MPEG-2 Video Decoding Circuit. %U http://dblp.uni-trier.de/db/journals/vlsisp/vlsisp20.html#CantineauPL98 %V 20

@article{journals/vlsisp/CantineauPL98, added-at = {2008-08-07T00:00:00.000+0200}, author = {Cantineau, Olivier and Petit, Laurent and Legat, Jean-Didier}, biburl = {https://www.bibsonomy.org/bibtex/22a08a1788433fd26bc431f83ce556373/dblp}, date = {2008-08-07}, description = {dblp}, ee = {http://dx.doi.org/10.1023/A:1008083015934}, interhash = {f2429a291aab5297240c1ffb63ec3367}, intrahash = {2a08a1788433fd26bc431f83ce556373}, journal = {VLSI Signal Processing}, keywords = {dblp}, number = 3, pages = {251-265}, timestamp = {2008-08-08T11:54:47.000+0200}, title = {Architecture of a Memory Manager for an MPEG-2 Video Decoding Circuit.}, url = {http://dblp.uni-trier.de/db/journals/vlsisp/vlsisp20.html#CantineauPL98}, volume = 20, year = 1998 }