Inproceedings,
Demonstration of 3D sequential FD-SOI on CMOS FinFET stacking featuring low temperature Si layer transfer and top tier device fabrication with tier interconnections.
A. Vandooren, N. Parihar, J. Franco, R. Loo, H. Arimura, R. Rodriguez, F. Sebaai, S. Iacovo, K. Vandersmissen, W. Li, G. Mannaert, D. Radisic, E. Rosseel, A. Hikavyy, A. Jourdain, O. Mourey, G. Gaudin, S. Reboh, L. Van-Jodin, G. Besnard, C. Neve, B. Nguyen, I. Radu, E. Litta, and N. Horiguchi.VLSI Technology and Circuits, page 330-331. IEEE, (2022)
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- conf/vlsit/VandoorenPFLARS22
- entry type
- inproceedings
- booktitle
- VLSI Technology and Circuits
- year
- 2022
- pages
- 330-331
- publisher
- IEEE
- crossref
- conf/vlsit/2022
- ee
- https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830400
- isbn
- 978-1-6654-9772-5
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- http://dblp.uni-trier.de/db/conf/vlsit/vlsit2022.html#VandoorenPFLARS22
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%1 conf/vlsit/VandoorenPFLARS22
%A Vandooren, A.
%A Parihar, N.
%A Franco, Jacopo
%A Loo, Roger
%A Arimura, Hiroaki
%A Rodriguez, R.
%A Sebaai, F.
%A Iacovo, S.
%A Vandersmissen, Kevin
%A Li, W.
%A Mannaert, G.
%A Radisic, D.
%A Rosseel, E.
%A Hikavyy, Andriy
%A Jourdain, Anne
%A Mourey, O.
%A Gaudin, G.
%A Reboh, Shay
%A Van-Jodin, L. Le
%A Besnard, Guillaume
%A Neve, C. Roda
%A Nguyen, Bich-Yen
%A Radu, Iuliana P.
%A Litta, E. Dentoni
%A Horiguchi, N.
%B VLSI Technology and Circuits
%D 2022
%I IEEE
%K dblp
%P 330-331
%T Demonstration of 3D sequential FD-SOI on CMOS FinFET stacking featuring low temperature Si layer transfer and top tier device fabrication with tier interconnections.
%U http://dblp.uni-trier.de/db/conf/vlsit/vlsit2022.html#VandoorenPFLARS22
%@ 978-1-6654-9772-5
@inproceedings{conf/vlsit/VandoorenPFLARS22,
added-at = {2024-10-06T00:00:00.000+0200},
author = {Vandooren, A. and Parihar, N. and Franco, Jacopo and Loo, Roger and Arimura, Hiroaki and Rodriguez, R. and Sebaai, F. and Iacovo, S. and Vandersmissen, Kevin and Li, W. and Mannaert, G. and Radisic, D. and Rosseel, E. and Hikavyy, Andriy and Jourdain, Anne and Mourey, O. and Gaudin, G. and Reboh, Shay and Van-Jodin, L. Le and Besnard, Guillaume and Neve, C. Roda and Nguyen, Bich-Yen and Radu, Iuliana P. and Litta, E. Dentoni and Horiguchi, N.},
biburl = {https://www.bibsonomy.org/bibtex/224a976884baa102b740bf23c3c317bae/dblp},
booktitle = {VLSI Technology and Circuits},
crossref = {conf/vlsit/2022},
ee = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830400},
interhash = {fdfb951072de039ed5c71d40225a27e1},
intrahash = {24a976884baa102b740bf23c3c317bae},
isbn = {978-1-6654-9772-5},
keywords = {dblp},
pages = {330-331},
publisher = {IEEE},
timestamp = {2024-10-07T09:09:27.000+0200},
title = {Demonstration of 3D sequential FD-SOI on CMOS FinFET stacking featuring low temperature Si layer transfer and top tier device fabrication with tier interconnections.},
url = {http://dblp.uni-trier.de/db/conf/vlsit/vlsit2022.html#VandoorenPFLARS22},
year = 2022
}