%0 Journal Article %1 journals/jssc/SchlottmannSNH12 %A Schlottmann, Craig %A Shapero, Samuel A. %A Nease, Stephen %A Hasler, Paul E. %D 2012 %J IEEE J. Solid State Circuits %K dblp %N 9 %P 2174-2184 %T A Digitally Enhanced Dynamically Reconfigurable Analog Platform for Low-Power Signal Processing. %U http://dblp.uni-trier.de/db/journals/jssc/jssc47.html#SchlottmannSNH12 %V 47

@article{journals/jssc/SchlottmannSNH12, added-at = {2020-08-30T00:00:00.000+0200}, author = {Schlottmann, Craig and Shapero, Samuel A. and Nease, Stephen and Hasler, Paul E.}, biburl = {https://www.bibsonomy.org/bibtex/2add26d89ded42a02667398db9bdca4e3/dblp}, ee = {https://doi.org/10.1109/JSSC.2012.2194847}, interhash = {20629d3c7f44e3c153d48e3e38bf7388}, intrahash = {add26d89ded42a02667398db9bdca4e3}, journal = {IEEE J. Solid State Circuits}, keywords = {dblp}, number = 9, pages = {2174-2184}, timestamp = {2020-08-31T11:41:10.000+0200}, title = {A Digitally Enhanced Dynamically Reconfigurable Analog Platform for Low-Power Signal Processing.}, url = {http://dblp.uni-trier.de/db/journals/jssc/jssc47.html#SchlottmannSNH12}, volume = 47, year = 2012 }