%0 Conference Paper %1 conf/fpga/JiangTB04 %A Jiang, Tianyi %A Tang, Xiaoyong %A Banerjee, Prithviraj %B FPGA %D 2004 %E Tessier, Russell %E Schmit, Herman %I ACM %K dblp %P 249 %T High level area, delay and power estimation for FPGAs. %U http://dblp.uni-trier.de/db/conf/fpga/fpga2004.html#JiangTB04 %@ 1-58113-829-6

@inproceedings{conf/fpga/JiangTB04, added-at = {2018-11-06T00:00:00.000+0100}, author = {Jiang, Tianyi and Tang, Xiaoyong and Banerjee, Prithviraj}, biburl = {https://www.bibsonomy.org/bibtex/22e03ba73be4e1dd486303ddc3e48b6e3/dblp}, booktitle = {FPGA}, crossref = {conf/fpga/2004}, editor = {Tessier, Russell and Schmit, Herman}, ee = {https://doi.org/10.1145/968280.968329}, interhash = {2832a2bebe7523bbc7c41999d9fd5368}, intrahash = {2e03ba73be4e1dd486303ddc3e48b6e3}, isbn = {1-58113-829-6}, keywords = {dblp}, pages = 249, publisher = {ACM}, timestamp = {2018-11-07T12:47:53.000+0100}, title = {High level area, delay and power estimation for FPGAs.}, url = {http://dblp.uni-trier.de/db/conf/fpga/fpga2004.html#JiangTB04}, year = 2004 }