%0 Conference Paper %1 conf/vlsit/ChakrabortySGSS22 %A Chakraborty, Wriddhi %A Shrestha, P. %A Gupta, A. %A Saligram, Rakshith %A Spetalnick, Samuel %A Campbell, J. %A Raychowdhury, Arijit %A Datta, Suman %B VLSI Technology and Circuits %D 2022 %I IEEE %K dblp %P 302-303 %T Multi-bit per-cell 1T SiGe Floating Body RAM for Cache Memory in Cryogenic Computing. %U http://dblp.uni-trier.de/db/conf/vlsit/vlsit2022.html#ChakrabortySGSS22 %@ 978-1-6654-9772-5

@inproceedings{conf/vlsit/ChakrabortySGSS22, added-at = {2022-08-29T00:00:00.000+0200}, author = {Chakraborty, Wriddhi and Shrestha, P. and Gupta, A. and Saligram, Rakshith and Spetalnick, Samuel and Campbell, J. and Raychowdhury, Arijit and Datta, Suman}, biburl = {https://www.bibsonomy.org/bibtex/225e44fb80a78e1af32fce95565cfc3c3/dblp}, booktitle = {VLSI Technology and Circuits}, crossref = {conf/vlsit/2022}, ee = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830483}, interhash = {3fdf4d6a6d06fca66e6d2c52a873dd72}, intrahash = {25e44fb80a78e1af32fce95565cfc3c3}, isbn = {978-1-6654-9772-5}, keywords = {dblp}, pages = {302-303}, publisher = {IEEE}, timestamp = {2024-04-09T19:13:06.000+0200}, title = {Multi-bit per-cell 1T SiGe Floating Body RAM for Cache Memory in Cryogenic Computing.}, url = {http://dblp.uni-trier.de/db/conf/vlsit/vlsit2022.html#ChakrabortySGSS22}, year = 2022 }