%0 Conference Paper %1 conf/isvlsi/SiRS21 %A Si, Qilin %A Rashid, M. Imtiaz %A Schäfer, Benjamin Carrión %B ISVLSI %D 2021 %I IEEE %K dblp %P 212-217 %T Micro-architecture Tuning for Dynamic Frequency Scaling in Coarse-Grain Runtime Reconfigurable Arrays with Adaptive Clock Domain Support. %U http://dblp.uni-trier.de/db/conf/isvlsi/isvlsi2021.html#SiRS21 %@ 978-1-6654-3946-6

@inproceedings{conf/isvlsi/SiRS21, added-at = {2024-02-05T00:00:00.000+0100}, author = {Si, Qilin and Rashid, M. Imtiaz and Schäfer, Benjamin Carrión}, biburl = {https://www.bibsonomy.org/bibtex/2fbb87a30897af0db0112266668d98353/dblp}, booktitle = {ISVLSI}, crossref = {conf/isvlsi/2021}, ee = {https://doi.org/10.1109/ISVLSI51109.2021.00047}, interhash = {617725f8a56d378095a00effb1814776}, intrahash = {fbb87a30897af0db0112266668d98353}, isbn = {978-1-6654-3946-6}, keywords = {dblp}, pages = {212-217}, publisher = {IEEE}, timestamp = {2024-04-09T11:37:01.000+0200}, title = {Micro-architecture Tuning for Dynamic Frequency Scaling in Coarse-Grain Runtime Reconfigurable Arrays with Adaptive Clock Domain Support.}, url = {http://dblp.uni-trier.de/db/conf/isvlsi/isvlsi2021.html#SiRS21}, year = 2021 }