%0 Journal Article %1 journals/dt/SirisantanaR04 %A Sirisantana, Naran %A Roy, Kaushik %D 2004 %J IEEE Des. Test Comput. %K dblp %N 1 %P 56-63 %T Low-Power Design Using Multiple Channel Lengths and Oxide Thicknesses. %U http://dblp.uni-trier.de/db/journals/dt/dt21.html#SirisantanaR04 %V 21

@article{journals/dt/SirisantanaR04, added-at = {2020-05-17T00:00:00.000+0200}, author = {Sirisantana, Naran and Roy, Kaushik}, biburl = {https://www.bibsonomy.org/bibtex/2619b79c507d23628cf29ce32b1dc6295/dblp}, ee = {http://doi.ieeecomputersociety.org/10.1109/MDT.2004.1261850}, interhash = {86429d0d9bee124bbdda99de0c7e1d99}, intrahash = {619b79c507d23628cf29ce32b1dc6295}, journal = {IEEE Des. Test Comput.}, keywords = {dblp}, number = 1, pages = {56-63}, timestamp = {2020-05-19T12:21:25.000+0200}, title = {Low-Power Design Using Multiple Channel Lengths and Oxide Thicknesses.}, url = {http://dblp.uni-trier.de/db/journals/dt/dt21.html#SirisantanaR04}, volume = 21, year = 2004 }