%0 Conference Paper %1 conf/asscc/WangRDMBHCDAN17 %A Wang, Angie %A Richards, Brian C. %A Dabbelt, Daniel Palmer %A Mao, Howard %A Bailey, Stevo %A Han, Jaeduk %A Chang, Eric %A Dunn, James %A Alon, Elad %A Nikolic, Borivoje %B A-SSCC %D 2017 %I IEEE %K dblp %P 305-308 %T A 0.37mm2 LTE/Wi-Fi compatible, memory-based, runtime-reconfigurable 2n3m5k FFT accelerator integrated with a RISC-V core in 16nm FinFET. %U http://dblp.uni-trier.de/db/conf/asscc/asscc2017.html#WangRDMBHCDAN17 %@ 978-1-5386-3178-2

@inproceedings{conf/asscc/WangRDMBHCDAN17, added-at = {2023-11-24T00:00:00.000+0100}, author = {Wang, Angie and Richards, Brian C. and Dabbelt, Daniel Palmer and Mao, Howard and Bailey, Stevo and Han, Jaeduk and Chang, Eric and Dunn, James and Alon, Elad and Nikolic, Borivoje}, biburl = {https://www.bibsonomy.org/bibtex/23211e762d7250ad573bbb7662a4e8883/dblp}, booktitle = {A-SSCC}, crossref = {conf/asscc/2017}, ee = {https://doi.org/10.1109/ASSCC.2017.8240277}, interhash = {87e805477511c90d0cdd53f3bff30a02}, intrahash = {3211e762d7250ad573bbb7662a4e8883}, isbn = {978-1-5386-3178-2}, keywords = {dblp}, pages = {305-308}, publisher = {IEEE}, timestamp = {2024-04-10T21:35:42.000+0200}, title = {A 0.37mm2 LTE/Wi-Fi compatible, memory-based, runtime-reconfigurable 2n3m5k FFT accelerator integrated with a RISC-V core in 16nm FinFET.}, url = {http://dblp.uni-trier.de/db/conf/asscc/asscc2017.html#WangRDMBHCDAN17}, year = 2017 }