%0 Conference Paper %1 conf/vlsid/BabuC05 %A Babu, Hafiz Md. Hasan %A Chowdhury, Ahsan Raja %B VLSI Design %D 2005 %I IEEE Computer Society %K dblp %P 255-260 %T Design of a Reversible Binary Coded Decimal Adder by Using Reversible 4-Bit Parallel Adder. %U http://dblp.uni-trier.de/db/conf/vlsid/vlsid2005.html#BabuC05 %@ 0-7695-2264-5

@inproceedings{conf/vlsid/BabuC05, added-at = {2023-03-24T00:00:00.000+0100}, author = {Babu, Hafiz Md. Hasan and Chowdhury, Ahsan Raja}, biburl = {https://www.bibsonomy.org/bibtex/298d2c0fd340650446f0770313e59a6cd/dblp}, booktitle = {VLSI Design}, crossref = {conf/vlsid/2005}, ee = {https://doi.ieeecomputersociety.org/10.1109/ICVD.2005.74}, interhash = {9fdd88f5b9144064be5c08031d3b7f94}, intrahash = {98d2c0fd340650446f0770313e59a6cd}, isbn = {0-7695-2264-5}, keywords = {dblp}, pages = {255-260}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T04:18:41.000+0200}, title = {Design of a Reversible Binary Coded Decimal Adder by Using Reversible 4-Bit Parallel Adder.}, url = {http://dblp.uni-trier.de/db/conf/vlsid/vlsid2005.html#BabuC05}, year = 2005 }