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Design of a Reversible Binary Coded Decimal Adder by Using Reversible 4-Bit Parallel Adder.

, and . VLSI Design, page 255-260. IEEE Computer Society, (2005)

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Network decomposition based large-scale reverse engineering of gene regulatory network., and . Neurocomputing, (2015)An improved method to infer Gene Regulatory Network using S-System., and . IEEE Congress on Evolutionary Computation, page 1012-1019. IEEE, (2011)Synthesis of Full-Adder Circuit Using Reversible Logic., , , and . VLSI Design, page 757-760. IEEE Computer Society, (2004)Design of a Reversible Binary Coded Decimal Adder by Using Reversible 4-Bit Parallel Adder., and . VLSI Design, page 255-260. IEEE Computer Society, (2005)Inferring large scale genetic networks with S-system model., , and . GECCO, page 271-278. ACM, (2013)Reconstructing Gene Regulatory Network with Enhanced Particle Swarm Optimization., , , and . ICONIP (2), volume 8835 of Lecture Notes in Computer Science, page 229-236. Springer, (2014)Incorporating time-delays in S-System model for reverse engineering genetic networks., , and . BMC Bioinform., (2013)Reverse Engineering Genetic Networks with Time-Delayed S-System Model and Pearson Correlation Coefficient., , and . ICONIP (2), volume 8227 of Lecture Notes in Computer Science, page 624-631. Springer, (2013)On the Analysis of Reversible Booth's Multiplier., , and . VLSID, page 170-175. IEEE Computer Society, (2015)Minimization of CTS of k-CNOT Circuits for SSF and MSF Model., , and . DFT, page 290-298. IEEE Computer Society, (2008)