%0 Journal Article %1 IJACSA.2011.020518 %A V. Hanuman Kumar, P Seetha Ramaiah %D 2011 %J International Journal of Advanced Computer Science and Applications(IJACSA) %K CIS. FPGA; Speech VLSI; processing system; %N 5 %T Computerised Speech Processing in Hearing Aids using FPGA Architecture %U http://ijacsa.thesai.org/ %V 2 %X The development of computerized speech processing system is to mimic the natural functionality of human hearing, because of advent of technology that used Very Large Scale Integration (VLSI) devices such as Field Programmable Gate Array (FPGA) to meet the challenging requirement of providing 100\% functionality of the damaged human hearing parts. Here a computerized laboratory speech processor based on Xilinx Spartan3 FPGA system was developed for hearing aids research and also presented comparison details of the commercially available Hearing Aids. The hardware design and software implementation of the speech processor are described in detail. The FPGA based speech processor is capable of providing high-rate stimulation with 12 electrodes against conventional 8 electrodes in earlier research. Using short biphasic pulses presented either simultaneously or in an interleaved fashion. Different speech processing algorithms including the Continuous Interleaved Sampling (CIS) strategy were implemented in this processor and tested successfully.

@article{IJACSA.2011.020518, abstract = {The development of computerized speech processing system is to mimic the natural functionality of human hearing, because of advent of technology that used Very Large Scale Integration (VLSI) devices such as Field Programmable Gate Array (FPGA) to meet the challenging requirement of providing 100\% functionality of the damaged human hearing parts. Here a computerized laboratory speech processor based on Xilinx Spartan3 FPGA system was developed for hearing aids research and also presented comparison details of the commercially available Hearing Aids. The hardware design and software implementation of the speech processor are described in detail. The FPGA based speech processor is capable of providing high-rate stimulation with 12 electrodes against conventional 8 electrodes in earlier research. Using short biphasic pulses presented either simultaneously or in an interleaved fashion. Different speech processing algorithms including the Continuous Interleaved Sampling (CIS) strategy were implemented in this processor and tested successfully.}, added-at = {2014-02-21T08:00:08.000+0100}, author = {{V. Hanuman Kumar}, P Seetha Ramaiah}, biburl = {https://www.bibsonomy.org/bibtex/23a7f92d11143af23bfc9a2cdfd970a6b/thesaiorg}, interhash = {d4700b32c53d2d2fbff0335f06c1e37e}, intrahash = {3a7f92d11143af23bfc9a2cdfd970a6b}, journal = {International Journal of Advanced Computer Science and Applications(IJACSA)}, keywords = {CIS. FPGA; Speech VLSI; processing system;}, number = 5, timestamp = {2014-02-21T08:00:08.000+0100}, title = {{Computerised Speech Processing in Hearing Aids using FPGA Architecture}}, url = {http://ijacsa.thesai.org/}, volume = 2, year = 2011 }