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A 0.47-1.6 mW 5-bit 0.5-1 GS/s Time-Interleaved SAR ADC for Low-Power UWB Radios.

, , , and . IEEE J. Solid State Circuits, 47 (7): 1594-1602 (2012)

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An Ultra-Low Power 1.7-2.7 GHz Fractional-N Sub-Sampling Digital Frequency Synthesizer and Modulator for IoT Applications in 40 nm CMOS., , , , , , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 64-I (5): 1094-1105 (2017)A 1.6mW 0.5GHz open-loop VGA with fast startup and offset calibration for UWB radios., , , and . ESSCIRC, page 103-106. IEEE, (2011)Design and built-in characterization of digital-to-time converters for ultra-low power ADPLLs., , , , , , , , and . ESSCIRC, page 283-286. IEEE, (2015)9.8 An 860μW 2.1-to-2.7GHz all-digital PLL-based frequency modulator with a DTC-assisted snapshot TDC for WPAN (Bluetooth Smart and ZigBee) applications., , , , , , , and . ISSCC, page 172-173. IEEE, (2014)24.7 A 673µW 1.8-to-2.5GHz dividerless fractional-N digital PLL with an inherent frequency-capture capability and a phase-dithering spur mitigation for IoT applications., , , , , , , and . ISSCC, page 420-421. IEEE, (2017)A 8mW-RX/113mW-TX, Sub-GHz SoC with time-dithered PA ramping for LPWAN applications., , , , , , , , , and 5 other author(s). ESSCIRC, page 376-379. IEEE, (2017)A high-band IR-UWB chipset for real-time duty-cycled communication and localization systems., , , , , , , , , and 3 other author(s). A-SSCC, page 381-384. IEEE, (2011)A circuit-design-driven tool with a hybrid automation approach for SAR ADCs in IoT., , , , , , , and . DATE, page 672-675. IEEE, (2018)A 7-to-10b 0-to-4MS/s flexible SAR ADC with 6.5-to-16fJ/conversion-step., , , , and . ISSCC, page 472-474. IEEE, (2012)A Low-Power Fast Start-Up Crystal Oscillator With an Autonomous Dynamically Adjusted Load., , , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 66-I (4): 1382-1392 (2019)