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A Ka-Band Deployable Active Phased Array Transmitter Fabricated on 4-Layer Liquid Crystal Polymer Substrate for Small-Satellite Mount., , , , , , , , , and 4 other author(s). IEEE Access, (2023)0.2mW 70Fsrms-Jitter Injection-Locked PLL Using De-Sensitized SSPD-Based Injecting-Time Self-Alignment Achieving -270dB FoM and -66dBc Reference Spur., , , , , , and . VLSI Circuits, page 38-. IEEE, (2019)ULPAC: A Miniaturized Ultralow-Power Atomic Clock., , , , , , , , , and . IEEE J. Solid State Circuits, 54 (11): 3135-3148 (2019)Dual-Layer Proton Irradiation for Creating Thermally-Stable High-Resistivity Region in Si CMOS Substrate., , , , , and . ESSDERC, page 191-194. IEEE, (2021)FPGA implementation of template matching using binary sum of absolute difference., , and . ICSET, page 13-17. IEEE, (2016)A Sub-THz Full-Duplex Phased-Array Transceiver with Self-Interference Cancellation and LO Feedthrough Suppression., , , , , , , , , and 5 other author(s). VLSI Technology and Circuits, page 1-2. IEEE, (2023)A Small-Satellite-Mounted 256-Element Ka-Band CMOS Phased-Array Transmitter Achieving 63.8dBm EIRP Under 26.6W Power Consumption Using Single/Dual Circular Polarization Active Coupler., , , , , , , , , and 15 other author(s). ISSCC, page 298-299. IEEE, (2023)24.3 A 236-to-266GHz 4-Element Amplifier-Last Phased-Array Transmitter in 65nm CMOS., , , , , , , , , and 9 other author(s). ISSCC, page 415-417. IEEE, (2024)Ultra-Low-Power Atomic Clock for Satellite Constellation with 2.2×10-12 Long-Term Allan Deviation Using Cesium Coherent Population Trapping., , , , , , , , and . ISSCC, page 462-464. IEEE, (2019)A Power-Efficient Pulse-VCO for Chip-Scale Atomic Clock., , , , , , and . IEICE Trans. Electron., 102-C (4): 276-286 (2019)