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Modeling of substrate contacts in TSV-based 3D ICs., , , , , , и . 3DIC, стр. 1-4. IEEE, (2014)Effect of substrate contacts on reducing crosstalk noise between TSVs., , , , , , и . APCCAS, стр. 763-766. IEEE, (2014)Effective capacitance for gate delay with RC loads., , и . ISCAS (3), стр. 2795-2798. IEEE, (2005)Capacitance and Yield Evaluations Using a 90-nm Process Technology Based on the Dense Power-Ground Interconnect Architecture., , , , , и . ISQED, стр. 153-158. IEEE Computer Society, (2005)Signal Propagation Delay Model in Vertically Stacked Chips., , , , и . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 98-A (12): 2614-2624 (2015)Cooling architectures using thermal sidewalls, interchip plates, and bottom plate for 3D ICs., , и . ISQED, стр. 283-288. IEEE, (2017)An analytical model of the overshooting effect for multiple-input gates in nanometer technologies., , , , и . ISCAS, стр. 1712-1715. IEEE, (2013)An effective model for evaluating vertical propagation delay in TSV-based 3-D ICs., , , , , , и . ISQED, стр. 519-523. IEEE, (2015)A simple yet precise capacitance estimation method for on-chip power delivery network towards EMC analysis., , , , , и . IEICE Electron. Express, 17 (14): 20200198 (2020)Deep Neural Network Based Inductance Calculations of Wireless Power Transfer Systems., , , , и . GCCE, стр. 222-223. IEEE, (2022)