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Gaussian Pyramid: Comparative Analysis of Hardware Architectures., , , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 64-I (9): 2308-2321 (2017)Event-Based CMOS Image Sensor with Shared DVS Module for Pixel Area Reduction., , , and . SBCCI, page 1-6. IEEE, (2020)Focal-plane image encoder with cascode current mirrors and increased vector quantization bit rate., , , , and . SBCCI, page 1-6. IEEE, (2016)Non-Memoryless vs. Memoryless Hardware Architectures for Convolutional Neural Networks., , , and . LASCAS, page 1-4. IEEE, (2021)Influence of cascode and simple current mirrors in inner product implementations for CMOS imagers., , and . LASCAS, page 1-4. IEEE, (2015)Early-exit deep neural networks for distorted images: providing an efficient edge offloading., , and . GLOBECOM, page 1-6. IEEE, (2021)High-level Performance Evaluation of Object Detection based on Massively Parallel Focal-plane Acceleration Requiring Minimum Pixel Area Overhead., , , , and . VISIGRAPP (3: VISAPP), page 81-87. SciTePress, (2016)CMOS Imager With Focal-Plane Analog Image Compression Combining DPCM and VQ., , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 60-I (5): 1331-1344 (2013)Neuromorphic Hardware Applied in the Development of Low-Power IoTs., , , , , and . SIoT, page 1-4. IEEE, (2022)Image Sensing Scheme Enabling Fully-Programmable Light Adaptation and Tone Mapping with a Single Exposure: Demo., , , and . ICDSC, page 202-203. ACM, (2016)