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Low-power high-yield SRAM design with VSS adaptive boosting and BL capacitance variation sensing.

N. Liu, Y. Jiang, Q. Dong, H. Li, X. Hu, and Y. Lin. ASICON, page 1-4. IEEE, (2013)

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Qing Shengzu

Lan Qing

Li Qing

Ma Qing

Qing Ye

Other publications of authors with the same name

Layout-aware variation evaluation of analog circuits and its validity on op-amp designs.K. Shinohara, M. Hidaka, J. Li, Q. Dong, B. Yang, and S. Nakatake. ACM Great Lakes Symposium on VLSI, page 247-252. ACM, (2011)Post-placement STI well width adjusting by geometric programming for device mobility enhancement in critical path.J. Li, B. Yang, Q. Dong, and S. Nakatake. ISCAS, page 929-932. IEEE, (2010)How does partitioning matter for 3D floorplanning?T. Yan, Q. Dong, Y. Takashima, and Y. Kajitani. ACM Great Lakes Symposium on VLSI, page 73-78. ACM, (2006)Cost-sensitive Classifier Selection when there is Additional Cost Information.R. Meekins, S. Adams, P. Beling, K. Farinholt, N. Hipwell, A. Chaudhry, S. Polter, and Q. Dong. COST@SDM, volume 88 of Proceedings of Machine Learning Research, page 17-30. PMLR, (2018)South China Sea internal wave analysis using radar imagery.Q. Dong, H. Guo, C. Zhou, Y. Shao, C. Wang, and Z. Li. IGARSS, page 3008-3010. IEEE, (2002)15.3 A 351TOPS/W and 372.4GOPS Compute-in-Memory SRAM Macro in 7nm FinFET CMOS for Machine-Learning Applications.Q. Dong, M. Sinangil, B. Erbagci, D. Sun, W. Khwa, H. Liao, Y. Wang, and J. Chang. ISSCC, page 242-244. IEEE, (2020)3.7 A 1920×1080 30fps 2.3TOPS/W stereo-depth processor for robust autonomous navigation.Z. Li, Q. Dong, M. Saligane, B. Kempke, S. Yang, Z. Zhang, R. Dreslinski, D. Sylvester, D. Blaauw, and H. Kim. ISSCC, page 62-63. IEEE, (2017)Low-Power and Low-Variability Programmable Delay Element and Its Application to Post-Silicon Skew Tuning.D. Murooka, Y. Zhang, Q. Dong, and S. Nakatake. ISVLSI, page 167-171. IEEE Computer Society, (2015)A 1.02nW PMOS-only, trim-free current reference with 282ppm/°C from -40°C to 120°C and 1.6% within-wafer inaccuracy.Q. Dong, I. Lee, K. Yang, D. Blaauw, and D. Sylvester. ESSCIRC, page 19-22. IEEE, (2017)A General-Purpose CRN-to-DSD Compiler with Formal Verification, Optimization, and Simulation Capabilities.S. Badelt, S. Shin, R. Johnson, Q. Dong, C. Thachuk, and E. Winfree. DNA, volume 10467 of Lecture Notes in Computer Science, page 232-248. Springer, (2017)

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Disambiguation of "Dong, Qing"

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Low-power high-yield SRAM design with VSS adaptive boosting and BL capacitance variation sensing.

Please choose a person to relate this publication to

Qing Shengzu

Lan Qing

Li Qing

Ma Qing

Qing Ye

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Dong, Qing"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Low-power high-yield SRAM design with VSS adaptive boosting and BL capacitance variation sensing.

Please choose a person to relate this publication to

Qing Shengzu

Lan Qing

Li Qing

Ma Qing

Qing Ye

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
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Low-power high-yield SRAM design with VSS adaptive boosting and BL capacitance variation sensing.