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Disambiguation of "Yoo, Changsik"

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A Low-Jitter Delay-Locked Loop with Harmonic-Lock Prevention.

, , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 85-A (2): 505-507 (2002)

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Chanyeol Yoo

Angelina Yoo

Young Yoo

Haiseung Yoo

Joonhyuk Yoo

 

Other publications of authors with the same name

Digital delay locked loop with open-loop digital duty cycle corrector for 1.2Gb/s/pin double data rate SDRAM., , , and . ESSCIRC, page 379-382. IEEE, (2004)A Low-Jitter Delay-Locked Loop with Harmonic-Lock Prevention., , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 85-A (2): 505-507 (2002)A 1.2V, 10MHz, low-pass Gm-C filter with Gm-cells based on triode-biased MOS and passive resistor in 0.13μm CMOS technology., , , , , and . CICC, page 195-198. IEEE, (2005)A 16Gb 9.5Gb/S/pin LPDDR5X SDRAM With Low-Power Schemes Exploiting Dynamic Voltage-Frequency Scaling and Offset-Calibrated Readout Sense Amplifiers in a Fourth Generation 10nm DRAM Process., , , , , , , , , and 37 other author(s). ISSCC, page 448-450. IEEE, (2022)Time-Based Digital LDO Regualtor with Fractionally Controlled Power Transistor Strength and Fast Transient Response., , , and . A-SSCC, page 45-48. IEEE, (2019)A 4ns Settling Time FVF-Based Fast LDO Using Bandwidth Extension Techniques for HBM3., , , , , , , , , and 4 other author(s). A-SSCC, page 1-3. IEEE, (2023)Spread spectrum clock generation for reduced electro-magnetic interference in consumer electronics devices., , and . IEEE Trans. Consumer Electronics, 56 (2): 844-847 (2010)A ±1.5V 4MHz Low-Pass Gm-C Filter in CMOS., and . ASP-DAC, page 341-342. IEEE, (1998)A 4-MHz Bandwidth Continuous-Time Sigma-Delta Modulator With Stochastic Quantizer and Digital Accumulator., and . IEEE Trans. Circuits Syst. II Express Briefs, 66-II (7): 1124-1128 (2019)An Offset-Compensated Charge-Transfer Pre-Sensing Bit-Line Sense-Amplifier for Low-Voltage DRAM., , , , , , , , , and 5 other author(s). VLSI Technology and Circuits, page 1-2. IEEE, (2024)