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Disambiguation of "Dielissen, John"

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An efficient on-chip NI offering guaranteed services, shared-memory abstraction, and flexible network configuration.

, , , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 24 (1): 4-17 (2005)

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Hans-Dieter John

Horst John

Annemarie Johne

Walter John

Walter John

 

Other publications of authors with the same name

Power-efficient layered turbo decoder processor., , , , , , and . DATE, page 246-251. IEEE Computer Society, (2001)An efficient on-chip NI offering guaranteed services, shared-memory abstraction, and flexible network configuration., , , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 24 (1): 4-17 (2005)An Efficient On-Chip Network Interface Offering Guaranteed Services, Shared-Memory Abstraction, and Flexible Network Configuration., , , , and . DATE, page 878-883. IEEE Computer Society, (2004)A Design Flow for Application-Specific Networks on Chip with Guaranteed Performance to Accelerate SOC Design and Verification., , , , , and . DATE, page 1182-1187. IEEE Computer Society, (2005)Low cost LDPC decoder for DVB-S2., , and . DATE Designers' Forum, page 130-135. European Design and Automation Association, Leuven, Belgium, (2006)Non-fractional parallelism in LDPC decoder implementations., and . DATE, page 337-342. EDA Consortium, San Jose, CA, USA, (2007)Breaking an application specific instruction-set processor: the first step towards embedded software testing., , and . HLDVT, page 89-92. IEEE Computer Society, (2002)Trade Offs in the Design of a Router with Both Guaranteed and Best-Effort Services for Networks on Chip., , , , , , and . DATE, page 10350-10355. IEEE Computer Society, (2003)A Scalable Architecture for LDPC Decodin., , , , and . DATE, page 88-95. IEEE Computer Society, (2004)Guaranteeing the Quality of Services in Networks on Chip., , , , , , , and . Networks on Chip, Kluwer / Springer, (2003)