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A history-based I-cache for low-energy multimedia applications., , and . ISLPED, page 148-153. ACM, (2002)Collective Communication Costs Analysis over Gigabit Ethernet and InfiniBand., , and . HiPC, volume 4297 of Lecture Notes in Computer Science, page 547-559. Springer, (2006)Circuit Area-latency Optimization Technique for High-precision Elementary Functions., , and . APCCAS, page 1406-1409. IEEE, (2006)Way-predicting set-associative cache for high performance and low energy consumption., , and . ISLPED, page 273-275. ACM, (1999)REDEFIS: a system with a redefinable instruction set processor., , , , , and . SBCCI, page 14-19. ACM, (2006)Performance/Energy Efficiency of Variable Line-Size Caches for Intelligent Memory Systems., , and . Intelligent Memory Systems, volume 2107 of Lecture Notes in Computer Science, page 169-178. Springer, (2000)The Kyushu University Reconfigurable Parallel Processor - Design Philosophy and Architecture., , , , and . IFIP Congress, page 995-1000. North-Holland/IFIP, (1989)A Design Methodology for Performance Maintenance of 3D Network-on-Chip with Multiplexed Through-Silicon Vias., , , and . MES@ISCA, page 9-16. ACM, (2014)Dynamic Optimization of Load Balance in MPI Broadcast., , , , and . PVM/MPI, volume 4757 of Lecture Notes in Computer Science, page 387-388. Springer, (2007)An Integrated Temporal Partitioning and Mapping Framework for Handling Custom Instructions on a Reconfigurable Functional Unit., , , , , and . Asia-Pacific Computer Systems Architecture Conference, volume 4186 of Lecture Notes in Computer Science, page 219-230. Springer, (2006)