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Low latency variable length coding scheme for frame memory recompression., , , and . ICME, page 232-237. IEEE Computer Society, (2010)Performance Improvement of Multiprocessor Simulation by Optimizing Synchronization a Communication., , and . IEEE International Workshop on Rapid System Prototyping, page 158-164. IEEE Computer Society, (2005)Cache Miss-Aware Dynamic Stack Allocation., , , and . ISCAS, page 3494-3497. IEEE, (2007)A Prediction Packetizing Scheme for Reducing Channel Traffic in Transaction-Level Hardware/Software Co-Emulation., , , , and . DATE, page 384-389. IEEE Computer Society, (2005)Improving Lookahead in Parallel Multiprocessor Simulation Using Dynamic Execution Path Prediction., and . PADS, page 11-18. IEEE Computer Society, (2006)Improvement of Compiled Instruction Set Simulator by Increasing Flexibility a., and . IEEE International Workshop on Rapid System Prototyping, page 38-44. IEEE Computer Society, (2004)