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Implementing Binarized Neural Networks with Magnetoresistive RAM without Error Correction.

T. Hirtzlin, B. Penkovsky, J. Klein, N. Locatelli, A. Vincent, M. Bocquet, J. Portal, and D. Querlioz. NANOARCH, page 1-5. IEEE, (2019)

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Vincent F Brunner

Adrien Weingärtner

Adrien Schoof

Adrien Coyette

Adrien Coulet

Other publications of authors with the same name

Monte Carlo simulations of carbon nanotube networks for optoelectronic applications.M. Diez-Garcia, A. Vincent, N. Izard, and D. Querlioz. NANOARCH, page 135-136. IEEE Computer Society/ACM, (2014)Exploiting the short-term to long-term plasticity transition in memristive nanodevice learning architectures.C. Bennett, S. Barbera, A. Vincent, J. Klein, F. Alibart, and D. Querlioz. IJCNN, page 947-954. IEEE, (2016)Use of Magnetoresistive Random-Access Memory as Approximate Memory for Training Neural Networks.N. Locatelli, A. Vincent, and D. Querlioz. ICECS, page 553-556. IEEE, (2018)Hardware Spiking Neural Networks: Slow Tasks Resilient Learning with Longer Term-Memory Bits.P. Lewden, A. Vincent, C. Meyer, J. Tomas, S. Siami, and S. Saïghi. BioCAS, page 1-4. IEEE, (2019)Toward Hardware Spiking Neural Networks with Mixed-Signal Event-Based Learning Rules.P. Lewden, A. Vincent, C. Meyer, J. Tomas, and S. Saïghi. IJCNN, page 1-8. IEEE, (2020)Flexible design methodology for spike encoding implementation on FPGA.C. Gillet, A. Vincent, B. Gal, and S. Saïghi. BioCAS, page 379-383. IEEE, (2022)Implications of the Use of Magnetic Tunnel Junctions as Synapses in Neuromorphic Systems.A. Vincent, N. Locatelli, Q. Wu, and D. Querlioz. ACM Great Lakes Symposium on VLSI, page 317-320. ACM, (2017)Preliminary Results Towards Reinforcement Learning with Mixed-Signal Memristive Neuromorphic Circuits.N. Wu, A. Vincent, and D. Strukov. ISCAS, page 1-5. IEEE, (2019)Implementing Binarized Neural Networks with Magnetoresistive RAM without Error Correction.T. Hirtzlin, B. Penkovsky, J. Klein, N. Locatelli, A. Vincent, M. Bocquet, J. Portal, and D. Querlioz. NANOARCH, page 1-5. IEEE, (2019)

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Disambiguation of "Vincent, Adrien F."

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Implementing Binarized Neural Networks with Magnetoresistive RAM without Error Correction.

Please choose a person to relate this publication to

Vincent F Brunner

Adrien Weingärtner

Adrien Schoof

Adrien Coyette

Adrien Coulet

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Vincent, Adrien F."

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Implementing Binarized Neural Networks with Magnetoresistive RAM without Error Correction.

Please choose a person to relate this publication to

Vincent F Brunner

Adrien Weingärtner

Adrien Schoof

Adrien Coyette

Adrien Coulet

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
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history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
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MSOffice XML

Implementing Binarized Neural Networks with Magnetoresistive RAM without Error Correction.