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VR-DANN: Real-Time Video Recognition via Decoder-Assisted Neural Network Acceleration.

, , , , , and . MICRO, page 698-710. IEEE, (2020)

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CNFET-Based High Throughput SIMD Architecture., , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 37 (7): 1331-1344 (2018)Energy-Efficient and Quality-Assured Approximate Computing Framework Using a Co-Training Method., , , , , , , and . ACM Trans. Design Autom. Electr. Syst., 24 (6): 59:1-59:25 (2019)Decoupling the Multi-Rate Dataflow Execution in Coarse-Grained Reconfigurable Array., , , , , , , and . ISCAS, page 1-5. IEEE, (2020)GCNTrain: A Unified and Efficient Accelerator for Graph Convolutional Neural Network Training., , , , and . ICCD, page 730-737. IEEE, (2022)FIMIL : A high-throughput deep learning model for abnormality detection with weak annotation in microscopy images., , , , , and . ACSW, page 34:1-34:6. ACM, (2020)PIPArch: Programmable Image Processing Architecture Using Sliding Array., , , , , and . ISPA/BDCloud/SocialCom/SustainCom, page 73-80. IEEE, (2021)DRQ: Dynamic Region-based Quantization for Deep Neural Network Acceleration., , , , , , and . ISCA, page 1010-1021. IEEE, (2020)E2SR: an end-to-end video CODEC assisted system for super resolution acceleration., , , and . DAC, page 229-234. ACM, (2022)PRADA: Point Cloud Recognition Acceleration via Dynamic Approximation., , , , , and . DATE, page 1-6. IEEE, (2023)Pipeline Balancing for Integrated Mapping in High Performance Spatial Programmable Architecture., , , , , , , and . FPL, page 116-122. IEEE, (2023)