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Can SAT be used to Improve Sequential ATPG Methods?

, , and . VLSI Design, page 585-. IEEE Computer Society, (2004)

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Comparing stress markers across various cohorts in a mobile setting., , , and . EMBC, page 7274-7277. IEEE, (2013)Verification of Industrial Designs Using A Computing Grid With More than 100 Nodes., , , and . Asian Test Symposium, page 460. IEEE Computer Society, (2005)Functional learning: a new approach to learning in digital circuits., , and . VTS, page 122-127. IEEE Computer Society, (1994)Probabilistic Design Verification., , , and . ICCAD, page 468-471. IEEE Computer Society, (1991)Reachability analysis using partitioned-ROBDDs., , , , and . ICCAD, page 388-393. IEEE Computer Society / ACM, (1997)Testing, Verification, and Diagnosis in the Presence of Unknowns., , , , , and . VTS, page 263-270. IEEE Computer Society, (2000)An Efficient Filter-Based Approach for Combinational Verification., , , , , and . DATE, page 132-137. IEEE Computer Society / ACM, (1999)Multiple Error Diagnosis Based on Xlists., , , , and . DAC, page 660-665. ACM Press, (1999)Dynamically resizable binary decision diagrams., and . ACM Great Lakes Symposium on VLSI, page 185-190. ACM, (2010)Optimizing BDDs for time-series dataset manipulation., and . DATE, page 1018-1021. EDA Consortium San Jose, CA, USA / ACM DL, (2013)