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Disambiguation of "Torreiter, Otto A."

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Implementation of the CELL Broadband Engine in a 65nm SOI Technology Featuring Dual-Supply SRAM Arrays Supporting 6GHz at 1.3V.

, , , , , , , , , , , and . ISSCC, page 322-606. IEEE, (2007)

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Otto A Sauer

A M Otto

Otto A Altenburger

Otto A Sauer

R. A. A. Bowler

 

Other publications of authors with the same name

24.1 A 6.2 GHz Single Ended Current Sense Amplifier (CSA) Based Compileable 8T SRAM in 7nm FinFET Technology., , , , , , , , , and 1 other author(s). ISSCC, page 334-336. IEEE, (2021)A 32kB 2R/1W L1 data cache in 45nm SOI technology for the POWER7TM processor., , , , , , , , , and 3 other author(s). ISSCC, page 344-345. IEEE, (2010)Implementation of the CELL Broadband Engine in a 65nm SOI Technology Featuring Dual-Supply SRAM Arrays Supporting 6GHz at 1.3V., , , , , , , , , and 2 other author(s). ISSCC, page 322-606. IEEE, (2007)Testing the Enterprise IBM System/390TM Multi Processor., , , and . ITC, page 115-123. IEEE Computer Society, (1997)A 4GHz, low latency TCAM in 14nm SOI FinFET technology using a high performance current sense amplifier for AC current surge reduction., , , , , , , and . ESSCIRC, page 343-346. IEEE, (2015)26.2 Power supply noise in a 22nm z13™ microprocessor., , , , , , , , , and 5 other author(s). ISSCC, page 438-439. IEEE, (2017)A system of array families and synthesized soft arrays for the POWER9™ processor in 14nm SOI FinFET technology., , , , , , , , , and 4 other author(s). ESSCIRC, page 303-307. IEEE, (2017)