( en | de | ru )

 

Disambiguation

From post

копироватьудалитьдобавить публикацию в буфер
Hierarchical synthesis of quantum and reversible architectures.

, и . Conf. Computing Frontiers, стр. 13:1-13:8. ACM, (2015)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed.

Dimitris Mislis

Dimitris Kazarnovskis

Dimitris Stathakos

Dimitris Theodoropoulos

Dimitris Depountis

 

Другие публикации лиц с тем же именем

Recursive Pseudo-Exhaustive Two-Pattern Generation., , и . IEEE Trans. Very Large Scale Integr. Syst., 18 (1): 142-152 (2010)Testability Analysis and Scalable Test Generation for High-Speed Floating-Point Units., , , и . IEEE Trans. Computers, 55 (11): 1449-1457 (2006)Anatomy of On-Chip Memory Hardware Fault Effects Across the Layers., и . IEEE Trans. Emerg. Top. Comput., 11 (2): 420-431 (апреля 2023)The functional and performance tolerance of GPUs to permanent faults in registers., , и . IOLTS, стр. 236-239. IEEE, (2013)Measuring the performance impact of permanent faults in modern microprocessor architectures., , , и . IOLTS, стр. 181-184. IEEE, (2013)Hierarchical synthesis of quantum and reversible architectures., и . Conf. Computing Frontiers, стр. 13:1-13:8. ACM, (2015)Bayesian network early reliability evaluation analysis for both permanent and transient faults., , , , , , , и . IOLTS, стр. 7-12. IEEE, (2015)Dependable Multicore Architectures at Nanoscale: The View From Europe., , , , , , , , , и 4 other автор(ы). IEEE Des. Test, 32 (2): 17-28 (2015)Energy Efficiency of Out-of-Order CPUs: Comparative Study and Microarchitectural Hotspot Characterization of RISC-V Designs., , , и . IISWC, стр. 216-220. IEEE, (2023)Estimating the Failures and Silent Errors Rates of CPUs Across ISAs and Microarchitectures., , и . ITC, стр. 377-382. IEEE, (2023)