Author of the publication

Power Analysis Attack Resistance Engineering by Dynamic Voltage and Frequency Scaling.

, , , , , and . ACM Trans. Embed. Comput. Syst., 11 (3): 62:1-62:16 (2012)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Online Scan Diagnosis : A Novel Approach to Volume Diagnosis., , , and . ITC, page 1-10. IEEE, (2018)An Algorithm for Synthesis of Reversible Logic Circuits., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 25 (11): 2317-2330 (2006)Synthesis of Majority and Minority Networks and Its Applications to QCA, TPL and SET Based Nanotechnologies., , and . VLSI Design, page 229-234. IEEE Computer Society, (2005)An Automatic Test Pattern Generation Framework for Combinational Threshold Logic Networks., , and . ICCD, page 540-543. IEEE Computer Society, (2004)Testing of Clock-Domain Crossing Faults in Multi-core System-on-Chip., , , , and . Asian Test Symposium, page 7-14. IEEE Computer Society, (2011)An Effective Methodology for Automated Diagnosis of Functional Pattern Failures to Support Silicon Debug.. ITC, page 1-8. IEEE, (2018)Case study: Alleviating hotspots and improving chip reliability via carbon nanotube thermal interface., , , and . DATE, page 1071-1076. IEEE, (2011)Test generation for combinational quantum cellular automata (QCA) circuits., , and . DATE, page 311-316. European Design and Automation Association, Leuven, Belgium, (2006)Resource-constrained multiprocessor synthesis for floating-point applications on FPGAs., and . ACM Trans. Design Autom. Electr. Syst., 16 (4): 41:1-41:29 (2011)Synthesis and Optimization of Threshold Logic Networks with Application to Nanotechnologies., , , and . DATE, page 904-909. IEEE Computer Society, (2004)