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Disambiguation of "Hsu, Chen-Kai"

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A 13.5-ENOB, 107-μW Noise-Shaping SAR ADC With PVT-Robust Closed-Loop Dynamic Amplifier.

, , , , , , , , , , and . IEEE J. Solid State Circuits, 55 (12): 3248-3259 (2020)

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Pen-chen Hsü

Yi-Chen Hsu

Fu-Chen Hsu

Yu-Chen Hsu

Jui-Chen Hsu

 

Other publications of authors with the same name

Hadamard-type and Bullen-type inequalities for Lipschitzian functions and their applications., , and . Comput. Math. Appl., 64 (4): 651-660 (2012)Error-Feedback Mismatch Error Shaping for High-Resolution Data Converters., , , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 66-I (4): 1342-1354 (2019)A 77.1-dB 6.25-MHz-BW Pipeline SAR ADC with Enhanced Interstage Gain Error Shaping and Quantization Error Shaping., , , , , , and . CICC, page 1-4. IEEE, (2020)A 77.1-dB-SNDR 6.25-MHz-BW Pipeline SAR ADC With Enhanced Interstage Gain Error Shaping and Quantization Noise Shaping., , , , , , , and . IEEE J. Solid State Circuits, 56 (3): 739-749 (2021)A 13.5-ENOB, 107-μW Noise-Shaping SAR ADC With PVT-Robust Closed-Loop Dynamic Amplifier., , , , , , , , , and 1 other author(s). IEEE J. Solid State Circuits, 55 (12): 3248-3259 (2020)A 0.01mm2 25µW 2MS/s 74dB-SNDR Continuous-Time Pipelined-SAR ADC with 120fF Input Capacitor., , , , , , , , and . ISSCC, page 64-66. IEEE, (2019)A 75.8dB-SNDR Pipeline SAR ADC with 2nd-order Interstage Gain Error Shaping., and . VLSI Circuits, page 68-. IEEE, (2019)A Pipeline SAR ADC With Second-Order Interstage Gain Error Shaping., , and . IEEE J. Solid State Circuits, 55 (4): 1032-1042 (2020)Visual Movement and Mental-Workload for Pilot Performance Assessment., , and . HCI (6), volume 9174 of Lecture Notes in Computer Science, page 356-364. Springer, (2015)A single-channel 10-b 400-MS/s 8.7-mW pipeline ADC in a 90-nm technology., and . A-SSCC, page 1-4. IEEE, (2015)