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TileFlow: A Framework for Modeling Fusion Dataflow via Tree-based Analysis.

, , , , , , and . MICRO, page 1271-1288. ACM, (2023)

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Rapid design space exploration of two-level unified caches., , , and . ISCAS, page 1937-1940. IEEE, (2014)EdgeFlow: Open-Source Multi-layer Data Flow Processing in Edge Computing for 5G and Beyond., , , , and . CoRR, (2018)Optimizing GPU energy efficiency with 3D die-stacking graphics memory and reconfigurable memory interface., , , and . ACM Trans. Archit. Code Optim., 10 (4): 24:1-24:25 (2013)Characterizing Membership Privacy in Stochastic Gradient Langevin Dynamics., , , , , , , , and . AAAI, page 6372-6379. AAAI Press, (2020)The Applications of NVM Technology in Hardware Security., , , , , , and . ACM Great Lakes Symposium on VLSI, page 311-316. ACM, (2016)Generalization in Generative Adversarial Networks: A Novel Perspective from Privacy Protection., , , , , , , and . NeurIPS, page 306-316. (2019)Asymmetric-access aware optimization for STT-RAM caches with process variations., , , , and . ACM Great Lakes Symposium on VLSI, page 143-148. ACM, (2013)A frequent-value based PRAM memory architecture., , , and . ASP-DAC, page 211-216. IEEE, (2011)Accelerate context switch by racetrack-SRAM hybrid cells., , and . NANOARCH, page 115-116. ACM, (2016)GNNSampler: Bridging the Gap Between Sampling Algorithms of GNN and Hardware., , , , , , , and . ECML/PKDD (5), volume 13717 of Lecture Notes in Computer Science, page 498-514. Springer, (2022)