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A high performance and low power hardware architecture for the transform & quantization stages in H.264., , , and . ICME, page 1102-1105. IEEE, (2009)Making Search Engines Faster by Lowering the Cost of Querying Business Rules Through FPGAs., , , , and . SIGMOD Conference, page 2255-2270. ACM, (2020)Synthesis of Platform Architectures from OpenCL Programs., , , and . FCCM, page 186-193. IEEE Computer Society, (2011)Centaur: A Framework for Hybrid CPU-FPGA Databases., , , and . FCCM, page 211-218. IEEE Computer Society, (2017)Enhancing Design Space Exploration by Extending CPU/GPU Specifications onto FPGAs, , , , , , , , , and . ACM Trans. Embedded Comput. Syst., 14 (2): 33:1--33:23 (2015)A Grammar Induction Method for Clustering of Operations in Complex FPGA Designs., , and . FCCM, page 194-201. IEEE Computer Society, (2014)Implementation and Performance Comparison of the Motion Compensation Kernel of the AVS Video Decoder on FPGA, GPU and Multicore Processors., , , , , , and . FCCM, page 255. IEEE Computer Society, (2011)Lowering the Latency of Data Processing Pipelines Through FPGA based Hardware Acceleration., , , , and . Proc. VLDB Endow., 13 (1): 71-85 (2019)Massively parallel programming models used as hardware description languages: The OpenCL case., , , , and . ICCAD, page 326-333. IEEE Computer Society, (2011)FPRESSO: Enabling Express Transistor-Level Exploration of FPGA Architectures., , , , and . FPGA, page 80-89. ACM, (2016)