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An optimal transistor-chaining algorithm for CMOS cell layout.

, , , and . ICCAD, page 344-347. IEEE Computer Society, (1989)

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A Synthesis Method for Mixed Synchronous / Asynchronous Behavior., , , and . EDAC-ETC-EUROASIC, page 277-281. IEEE Computer Society, (1994)A high-performance hardwired CABAC decoder for ultra-high resolution video., and . IEEE Trans. Consumer Electronics, 55 (3): 1614-1622 (2009)Array allocation taking into account SDRAM characteristics., and . ASP-DAC, page 497-502. ACM, (2000)A high performance three-engine architecture for H.264/AVC fractional motion estimation., , and . ICME, page 133-136. IEEE Computer Society, (2008)Test Scheduling and Test Access Architecture Optimization for System-on-Chip., , , , , , and . Asian Test Symposium, page 411-. IEEE Computer Society, (2002)Test Scheduling of BISTed Memory Cores for SOC., , , , , , and . Asian Test Symposium, page 356-. IEEE Computer Society, (2002)Combining technology mapping and placement for delay-optimization in FPGA designs., , , , and . ICCAD, page 123-127. IEEE Computer Society / ACM, (1993)State Assignment for Power and Area Minimization., , , , and . ICCD, page 250-254. IEEE Computer Society, (1994)A Low-Power High-Performance H.264/AVC Intra-Frame Encoder for 1080pHD Video., , , , and . IEEE Trans. Very Large Scale Integr. Syst., 19 (6): 925-938 (2011)Exploring the power of lightweight YOLOv4., , , , and . ICCVW, page 779-788. IEEE, (2021)